So the man is wrong b/c you don\'t like his nick name? Hannibal has a non-media (modern), and historical significance. But all Americans seem to know is based on television.

You keep making claims of deep understanding, and learned comprehension. OTOH you can\'t demonstrate it? You resort to an Ad Hominem (go look it up) attack on just one of my sources, yet you think it invalidates everything else? Now just who is delusional?

Have you read even one of them all the way through? Don\'t say you don\'t have time, you read \"Structured Computer Organization, Modern Operating Systems\" for fun. You\'re right, this is a waste of time. I agree with you.

I think you\'re confused. Not only does RISC not have microcode, neither does anybody else who makes CISC based chips. The only CISC to use microcode is from Intel. All CISC implimentations use variable length instructions. One RISC characteristic is non-variable instruction length which speeds up execution. An example of VLIW implimentation is Transmeta\'s Crusoe. (w/o the codemorphing software which is NOT microcode)

url:http://www.transmeta.com/crusoe/vliw.html

I wasn\'t talking at all about EPIC anymore. RISC as a philosophy is no longer being used. Even the POWER5 while being called RISC is more like my argument for calling it \"Modern RISC\", and in that light moving scheduling into the instruction set is the next step on that path.

I was talking about VLIW, and from what I read scheduling was put into the instuction set. (hardware) Also the whole RISC philosophy was lets use multiplication as an example. In RISC you would have no instruction for multiply, instead the programmer would need to do multiple loops of adds to achieve this result. In CISC you would just use the multiply instruction. Now \"Modern RISC\" chips have evolved so far out of this that they are adding SIMD instructions. If you follow this out even further with OoO execution, adding instruction for scheduling is not hard to imagine. Therefore VLIW is RISC, but not in the old context since not even POWER5 is RISC in the old context.

BTW scheduling != hyperthreading && hyperthreading == subset of scheduling

Keep in mind, the battles should be logged. Else if someone accomplishes the unimaginable, nobody believes them.

Read what I said, and what I did not.

(BTW, parting note: Allot of amd64 chips require registered RAM (even in 32bit) great for servers like mine , but bad for over all perfomance. Read with a careful eye on what metrics can influence your results. Chip model, what kind of RAM, remember PC333 was faster than PC400. People seem to have forgotten all of this when the Opteron was released)

Look it\'s been fun, really. I have even more fun arguing with a member of my team over the Pentium M. I\'m getting bored teaching you about semiconductor theory/design. I suggest you go read up on it some more.

Good luck, and have fun.

TMK IA64 is the very first VLIW processor. That is what made it cool. FYI it was never designed for consumer use.

(1) Sadly, it\'s why I use x86 as well. (2) Yes, you\'re wrong. ...again. (3) You miss the point x86 its self is dung. Even sparc (ugh) is better. Here\'s another reason to embrace only free software. It makes mass arch migrations trivial.

I almost bought a Cray vector machine from a recycler.

\"They are not implementations of x86-64. There is amd64 and em64t/ia32e (Intel uses two names for unknown reasons). The arch formerly introduced as x86-64 in 1999 was renamed to amd64 in 2003. amd64 is not a superset of x86-64, it is the same arch. So it would be correct to state that em64t/ia32e is an implementation of amd64.\"

A quote from the Debian threads on amd64 arch.

I still know, you don\'t know what you\'re talking about. I study pipelines for scientific computing. I know EM64T, and AMD64 are not the same. That is why it\'s called an \"implimentaion.\" (go look it up) Now who\'s assuming things. \"Obviously you don\'t\" I got a message for you on line 1, it\'s Mr. Pot and he says you\'re black Mr. Kettle.

You said it perfectly \"stuck on.\" Intel running heavy 64bit code is buggy. Oh wait, you just said as much. \"under load\" So which is it? Either my systems are setup wrong, or you just argeed with me?

1.) in your words, \"EMT64 is just the AMD64 technology stuck onto an existing Pentium4 chip.\" (BTW it\'s EM64T, and go look it up if you don\'t believe me \"Extended Memory 64-bit Technology\")

2.) in your words, \"I\'m using gentoo linux on both systems and I see little difference...only under load.\"

Now who looks very stupid? ...or arguing just to be arguing. Nothing I have said in any technical detail is wrong. Only the opposite can be said for you. The obvious conclusion here is that you need 4 64bit machines too, and then you\'ll know also what you\'re talking about?

What were we waiting for?